1. Field of the Invention
This invention relates to a disc-shaped semiconductor wafer and a disc-shaped semiconductor device wafer, which are provided with a chamfer around a circumferential edge thereof.
2. Description of the Related Art
Referring to FIG. 22, a general semiconductor wafer 220 is a disc-shaped semiconductor wafer provided with chamfers around front surface side and back surface side circumferential edges, respectively, of the wafer.
Herein, a general production process for the semiconductor wafer 220 such as GaAs or the like is described.
First, a grown semiconductor crystal is surface ground, shaped into a cylinder, and sliced with an inner diameter saw or a wire saw into a specified thickness wafer shape, to provide a disc-shaped as-sliced wafer.
Thereafter, to prevent cracking or chipping of an end face of the as-sliced wafer, the as-sliced wafer is chamfered with a wafer end face grinder (chamfering machine). In particular, when the size of the as-sliced wafer is not more than 125 mm in diameter, a circumferential edge thereof including an orientation flat (herein referred to as “OF”) and an index flat (herein referred to as “IF”) is chamfered by use of a grindstone or the like, and when the size of the as-sliced wafer is not less than 150 mm in diameter, a circumferential edge thereof including a notch is chamfered by use of a grindstone or the like.
Following the above process, the wafer is lapped or flat surface ground for enhancement in flatness, and is etched for affected layer removal and cleaning. After the etching, the wafer is double-side ground so that both a front surface and a back surface thereof are mirrored surfaces having a high flatness. This double-side grinding is performed by use of typically a nonwoven polishing cloth.
Thereafter, the front surface of the wafer is polished to a mirror finish by use of a foamed polyurethane soft polishing cloth. Following that, the wafer is washed and finally dried, resulting in the semiconductor wafer 220.
The purpose of the previously described chamfering is to prevent the occurrence of chipping or cracking of the end face 221 of the semiconductor wafer 220, in the subsequent polishing step and in a device manufacturing process.
Particularly in the device manufacturing, for the purpose of reducing the device size, a semiconductor device wafer 231 as shown in FIG. 23 may be manufactured by forming a device structure layer 230 such as a semiconductor epitaxial layer on the front surface of the semiconductor wafer 220, and thereafter grinding the back surface side of the semiconductor wafer 220, the properties of which are unaffected by the back grinding. In FIG. 23, a portion indicated by a dotted line shows a portion to be removed by back grinding. The thickness of the semiconductor wafer 220 may finally be reduced to around 100 μm.
In this case, if the chamfer has the shape as shown in FIG. 22, the end face 221 of the semiconductor wafer 220 is shaped at an acute angle in accordance with the reduction in thickness of the semiconductor wafer 220. As a result, the end face 221 of the semiconductor wafer 220 tends to be subject to excessive stress. This causes the chipping or cracking of the end face 221 of the semiconductor wafer 220.
In view of this point, there has been suggested a semiconductor wafer devised so that the end face 221 after the back grinding (back lapping) has no acute angle shape.
For example, Japanese Patent Laid-Open No. 2006-40994 (JP-A-2006-40994) suggested a semiconductor wafer, in which an end face is sloped at an acute angle with respect to a front surface of the wafer and at an obtuse angle with respect to a back surface of the wafer, and the end face of the wafer is chamfered around a front surface circumferential edge and a back surface circumferential edge, respectively.
According to this structure, the end face of the wafer after the back grinding in device manufacturing can be shaped into a quasi circular arc, as if chamfered, so that the occurrence of chipping or cracking of the end face of the wafer can be reduced.
Japanese Patent Laid-Open No. 2008-156189 (JP-A-2008-156189) discloses a conventional nitride semiconductor free-standing substrate and a method for fabricating the same.